ltc3633aefe - 3 1 description demonstration circuit dc1896 is a dual output regul ator consisting of two constant-frequency step-down conv ert- ers, based on the ltc3633a-3 monolithic dual channe l synchronous buck regulator. the dc1896 has an inpu t voltage range of 3.6v to 20v, with each regulator c apable of delivering up to 3a of output current. the dc18 96 can operate in either burst mode ? or forced continuous mode. in shutdown, the dc1896 can run off of less than 15 ua total. the dc1896 is a very efficient circui t: up to 90%. the dc1896 uses the 28 pin qfn LTC3633AEFE-3 package, which has an exposed pad on the bottom-sid e of the ic for better thermal performance. these fea tures, plus a programmable operating frequency range from 500 khz to 4 mhz (2 mhz switching frequency with th e rt pin connected to intvcc), make the dc1896 demo board an ideal circuit for use industrial or distri buted power applications. design files for this circuit are available at www.linear.com/demo. quick start procedure the dc1896 is easy to set up to evaluate the performance of the ltc3633a-3. for a proper measurement equipment configuration, set up the circuit according to the diagram in figure 1. note: when measuring the input or output voltage ripple, care must be taken to avoid a long ground lead on the oscilloscope probe. measure the input or output voltage ripple by touching the probe tip directly across the vin or vout and gnd terminals. see the proper scope probe technique in figure 2. please follow the procedure outlined below for proper operation. 1. connect the input power supply to the vin1/vin2 and gnd terminals (vin1 and vin2 are separate nodes.). connect the loads be- tween the vout and gnd terminals. refer to figure 1 for the proper measurement equip- ment setup. before proceeding to operation, insert jumper shunts xjp1 and xjp2 into the off positions of headers jp1 and jp2, shunt xjp11 into the on position (180 out-of-phase) of phase header jp11, shunts xjp3 and xjp4 into the soft-start (ss) positions of headers jp3 and jp4, shunt xjp8 into the forced continuous mode (fcm) position of mode header jp8, shunt xjp14 into the 1 mhz position of the frequency (freq) header jp14, shunts xjp12 and xjp13 into the external (ext) compensation positions of headers jp12 and jp13, and shunt xjp6 into the vout1 voltage options of choice of header jp6: 1.5v, 1.8v, or 2.5v, and a shunt into the vout2 voltage option of choice: 2.5v (header jp15), 3.3v (header jp5), or 5v (header jp7). 2. apply 5.5v at vins 1 & 2. measure both vouts; they should read 0v. if desired, one can measure the shutdown supply current at this point. the supply current will be less than 15 ua in shutdown. 3. turn on vout1 and vout2 by shifting shunts xjp1 and xjp2 from the off positions to the on positions. both output voltages should be within a tolerance of +/- 2%. 4. vary the input voltages from 5.8v (the min. vin is dependent on vout) to 20v, and the load currents from 0 to 3a. both output voltages should be within +/- 3% tolerance. demo circuit 1896 a demo board manual ltc3633aefe - 3 dual channel 3a 20 v monolithic synchronous step- down regulator board
ltc3633aefe - 3 2 5. set the load current of both outputs to 3a and t he input voltages to 20v, and then measure each out put ripple voltage (refer to figure 2 for proper measurement technique ); they should each measure less than 30 mvac. als o, observe the voltage waveform at either switch node (pins 23 & 2 4 for reg.1 and 13 & 14 for reg.2) of each regulato r. the switching frequencies should be between 800 khz and 1.2 mhz ( t = 1.25 us and 0.833 us). to attain 2 mhz operati on, change the shunt position on header jp14. in all cases, both switch node waveforms should be rectangular in shap e, and 180 ? out- of-phase with each other. change the shunt positio n on header jp11 to set the switch waveforms in pha se with respect to each other. to operate the ckt.s in burst mode ? , change the shunt in header jp8 to the burst mode ? position. when finished, insert shunts xjp1 and xjp2 to the off po sition(s) and disconnect the power. 6. regulators 1 (vin1) and 2 (vin2) are completely separated from each other; thus, they can be powere d from different individ- ual input supplies, as can the signal input supply. of course, all the voltage requirements still mus t be met: 1.5v to 20v for the pvin pins and 3.6v to 20v for the svin pin. warning - if the power for the demo board is carrie d in long leads, the input voltage at the part coul d ?ring?, which could affect the operation of the circuit or even exceed the maximum voltage rating of the ic. to eliminate the ringin g, a small tantalum capacitor (for instance, avx part # tpsy226m035r0200) is inserted on the pads between the input power and return term inals on the bottom of the demo board. the (greater) esr of the tantalum capa citor will dampen the (possible) ringing voltage ca used by the long input leads. on a normal, typical pcb, with short traces, this c apacitor is not needed. table 1. performance summary (t a = 25c) parameter conditions value minimum input voltages 3.6v maximum input voltages 20v run pin = gnd shutdown run run pin = v in operating 1.5v 3% (1.455v - 1.545v) 1.8v 3% (1.746v ? 1.854v) output voltage v out1 regulation v in1 = 3.6v to 20v, i out1 = 0a to 3a 2.5v 3% (2.425v ? 2.575v) typical output ripple v out1 v in1 = 12v, i out1 = 3a (20 mhz bw) < 30mv p?p 2.5v 3% (2.425v ? 2.575v) 3.3v 3% (3.201v ? 3.399v) output voltage v out2 regulation v in2 = 3.6v to 20v, i out2 = 0a to 3a 5v 3% (4.85v ? 5.15v) typical output ripple v out2 v in2 = 12v, i out2 = 3a (20 mhz bw) < 30mv p?p rt pin connected to 324k 1 mhz nominal switching frequencies rt pin = intv cc 2 mhz channel 1: vin = 12v, vout1 = 1.8v, fsw = 1 mhz io ut1 < 1.5a channel 2: vin = 12v, vout2 = 3.3v, fsw = 1 mhz io ut2 < 1.25a channel 1: vin = 12v, vout1 = 1.8v, fsw = 2 mhz io ut1 < 1a burst mode ? operation output current thresholds channel 2: vin = 12v, vout2 = 3.3v, fsw = 2 mhz io ut2 < 0.75 a phase pin = intv cc out-of-phase phase phase pin = gnd in phase intv cc 3.3v 6%
ltc3633aefe - 3 3 figure 1. proper measurement equipment setup figure 2. measuring input or output ripple
ltc3633aefe - 3 4 figure 3. ltc3633a-3 dc1896 switch operation v in1&2 = 12v, v out1 = 1.8v @ i out1 = 3a, v out2 = 3.3v @ i out2 = 3a forced continuous mode f sw = 1 mhz external compensation: rithx = 13k, cithx = 220 pf trace 1: v sw1 (10v/div) trace 3: v out1 ac voltage (20mv/div ac) trace 2: v sw2 (10v/div) trace 4: v out2 ac voltage (20mv/div ac)
ltc3633aefe - 3 5 figure 4. v out1 load step response v in1 = 12v, v out1 = 1.8v, 3a load step (0a <-> 3a) forced continuous mode f sw = 1 mhz external compensation: rith1 = 13k, cith1 = 220 pf trace 1: output voltage (100mv/div ac) trace 4: output current (1a/div)
ltc3633aefe - 3 6 figure 5. v out2 load step response v in2 = 12v, v out2 = 3.3v, 3a load step (0a <-> 3a) forced continuous mode f sw = 1 mhz external compensation: rith2 = 13k, cith2 = 220 pf trace 1: output voltage (200mv/div ac) trace 4: output current (1a/div)
ltc3633aefe - 3 7 figure 6. ltc3633a-3 dc1896 efficiency
ltc3633aefe - 3 8 d2 opt intvcc cffw1 10pf rith1 13k 1% rtr3 opt rtr1 0 c2 0.1uf jp15 2.5v r10 26.7k 1% d4 cmdsh-3-tr r11 10k d3 cmdsh-3-tr svin vin2 vin1 vo2 select r6 18.7k 1% [1] intvcc 22uf cout1 6.3v 1206 d1 opt intvcc + cin5 22uf 25v 7343 vout1 jp13 ith2 ext int 1 3 2 10uf cout5 6.3v 0805 e4 vout1 3a intvcc vin1 jp3 ss track track/ss1 1 3 2 10uf cout6 6.3v 0805 vout2 (int.) jp8 mode fcm (forced continuous mode) burst mode sync 1 2 3 4 5 6 ctr1 4700pf jp4 track/ss2 ss track 1 3 2 cc2 10pf opt ctr2 4700pf vin2 l2 2.2uh e6 gnd e15 gnd rpg1 100k e2 vin1 jp1 on off run1 1 3 2 svin e3 gnd rphmde 1m cvcc 1uf + cin6 22uf 25v 7343 [1] e16 vin2 vin2 run1 3.6v - 20v vishay ihlp-2020bzer1r0m01 e10 intvcc e13 svin e7 gnd e14 gnd vin1 jp6 vo1 select 1 2 3 4 5 6 jp7 5v r3 34.8k 1% e5 vout2 r5 23.2k 1% cc1 10pf opt cin2 22uf 25v 1210 rtr4 opt rtr2 0 rpg2 100k cin3 22uf 25v 1210 opt cin4 22uf 25v 1210 opt jp2 run2 on off 1 3 2 svin run2 r2 1m 3a r12 opt vin1 r4 84.5k 1% cvcc1 1uf vin2 jp5 3.3v csvin 1uf r8 11.5k 1% csvin1 1uf to the use of long input leads. on a normal, typica l pcb, with short traces, vishay ihlp-2020bzer2r2m01 cith1 220pf rith2 13k 1% e1 pgood1 e9 track1 e8 pgood2 e11 track2 e12 sync r9 11k 1% r7 17.4k 1% jp11 on off phase 1 3 2 size date: ic no. rev. sheet of title: approvals pcb des. app eng. technology fax: (408)434-0507 milpitas, ca 95035 phone: (408)432-1900 1630 mccarthy blvd. ltc confidential-for customer use only customer notice linear technology has made a best effort to design a circuit that meets customer-supplied specifications ; however, it remains the customer's responsibility t o verify proper and reliable operation in the actual application. component substitution and printed circuit board layout may significantly affect circu it performance or reliability. contact linear technology applications engineering for assistance. this circuit is proprietary to linear technology an d schematic supplied for use with linear technology parts. scale = none www.linear.com 1 05/03/13 12:32:05 1 1 dual synchronous step-down mi tom g. n/a LTC3633AEFE-3 demo circuit 1896a regulator 1.5v 1.8v 2.5v u1 LTC3633AEFE-3 von1 28 boost1 22 intvcc 21 boost2 20 sgnd 10 von2 15 vfb2 12 track/ss2 13 ith2 14 pgood2 11 sw2 16 sw2 17 pvin2 18 pvin2 19 run2 9 rt 8 mode/sync 7 run1 6 pvin1 25 pvin1 24 sw1 26 sw1 27 pgood1 4 track/ss1 2 vfb1 3 pgnd 29 ith1 1 phmode 5 svin 23 l1 1.0uh r1 1m cith2 220pf c1 0.1uf cffw2 10pf intvcc rt 324k 1% 22uf cout3 6.3v 1206 intvcc 22uf cout4 6.3v 1206 22uf cout2 6.3v 1206 jp12 ext int ith1 1 3 2 notes: unless otherwise specified, intvcc [1] cin5 and cin6 are inserted on dc1896a to damp en the (possible) ringing voltage due cin5 and cin6 are not needed. 3.6v - 20v intvcc jp14 1mhz 2mhz freq 1 3 2 cin1 22uf 25v 1210
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